Future Computing Paradigms for Scalable Artificial Intelligence Applications
DOI:
https://doi.org/10.5281/zenodo.19152685Keywords:
future computing, scalable AI, in-memory computing, photonic computing, approximate computing, wafer-scale integration, AI hardwareAbstract
The exponential growth of artificial intelligence workloads — driven by increasingly large foundation models, real-time inference demands, and
ubiquitous AI integration across industrial and consumer applications — is outpacing the capacity of conventional von Neumann computing
architectures to deliver scalable, energy-efficient computation. Future computing paradigms, including in-memory computing (IMC), photonic
computing, wafer-scale integration, and approximate computing, offer architectural innovations that fundamentally reimagine the relationship
between computation, memory, and data movement for AI workloads. This study presents ScaleAI-Arch, a systematic comparative evaluation
framework for emerging computing paradigms applied to scalable AI applications, analysing performance, energy efficiency, accuracy-efficiency
trade-offs, and deployment readiness across four paradigms. ScaleAI-Arch was applied to five representative AI workloads spanning language
modelling (GPT-scale transformer), image classification (ResNet-152), real-time object detection (YOLOv8), large-scale recommendation systems,
and scientific simulation neural surrogates. In-memory computing achieved 42.7× energy efficiency improvement over GPU baseline for
matrix-vector multiplication. Photonic computing delivered 127× speed improvement for Fourier-domain convolutions. Approximate computing
reduced energy by 61.4% with less than 2% accuracy loss. Wafer-scale integration achieved 9.4× throughput improvement for transformer attention
operations. These results provide a comprehensive, workload-grounded evaluation of future computing paradigm suitability for next-generation
scalable AI deployment.








